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1 features ? all-in-one design ? midi control processor ? synthesis ? compatible effects: reverb + chorus ? programmable spatial effects for four-channel surround (1) ? four-band stereo equalizer state-of-the-art synthesis supplies best quality for price ? 34-voice polyphony + effects ? up to 1 mb wavetable/firmware support synthesizer chipset: ATSAM9713 + 8-mbit rom + 32k x 8 sram + dac hardware-programmable dac mode ? i2s 16 to 20 bits ? japanese 16 bits firmware/sample set available for turnkey designs ? 8-mbit gs ? gms960800b (2) ? 8-mbit cleanwave ? gms970800b typical applications: cost-sensitive portable karaoke/vcd karaoke 80-lead tqfp package: small footprint, easy mounting ideal for battery operation ? low power ? power-down mode ? wide supply voltage range: 3v to 4.5v core, 3v to 5.5v periphery notes: 1. four-channel surround requires additional dac. 2. gms960800b with express permission of roland corporation. special licensing conditions apply. refer to warning on last page of this datasheet. description the highly integrated architecture of the ATSAM9713 combines a specialized high- performance risc digital signal processor and a general-purpose 16-bit cisc control processor on a single chip. an on-chip memory management unit allows the digital signal processor and the control processor to share external rom and ram devices. the rom bus width should be 16 bits while the sram can be selected to be 8 or 16 bits wide. when using an 8-bit sram, fast type (static cache) should be selected because two sram cycles will be completed in one rom cycle duration. running at 300 million operations per second (mops), the digital signal processor supports high-quality pcm synthesis as well as most important functions like reverb, chorus, surround effect and equalizer. by adding an additional stereo dac, four-chan- nel audio surround can also be obtained. the ATSAM9713 operates from a low-frequency 9.6 mhz typical crystal. a built-in pll raises this frequency to a 38.4 mhz internal clock that controls the two processors. care has been taken that output pin signals change only when necessary. this mini- mizes rfi (radio frequency interferences) and power consumption. minimizing rfi is mostly important in order to comply with standards such as fcc, csa and ce. the core power supply for the ATSAM9713 should range from 3v to 4.5v; the periph- ery supports supply from 3v to 5.5v. therefore, by selecting 3.3v rom, sram and dac, it is possible to develop low-power/low-voltage portable applications. sound synthesis ATSAM9713 low-cost integrated synthesizer with effects rev. 1712b-drmsd?11/02
2 ATSAM9713 1712b?drmsd?11/02 figure 1. typical hardware configuration ATSAM9713 midi_in audio out 1 mb rom 32k x 8 ram stereo dac
3 ATSAM9713 1712b?drmsd?11/02 pin description pins by function note: pin names exhibiting an overbar (woe for example) indicate that the signal is active low. table 1. power supply group pin name pin number type function gnd 5, 14, 21, 23, 36, 38, 57, 61, 62, 65, 74 pwr digital ground all pins should be connected to a ground plane. v cc 1, 6, 13, 18, 22, 32, 56, 6480 pwr power supply, 3v to 5.5v all pins should be connected to a vcc plane v c3 7, 17, 63 pwr core power supply, 3v to 4.5v all pins should be connected to nominal 3.3v. if 3.3v is not available, then v c3 can be derived from 5v by two 1n4148 diodes in series. table 2. serial midi pin name pin number type function midi_in 15 in serial ttl midi in. all controls are received by this pin. table 3. external rom/ram group pin name pin number type function wa[18:0] 37, 39, 41 - 55, 58, 59 out external rom/ram address for up to 512k words (8m bits) of memory. rom memory holds firmware and pcm data. ram memory holds working variables and effects delay lines. wd[15:0] 66 - 73, 75 - 79, 2 - 4 i/o external rom/ram data. holds read data from rom or ram when woe is low, writes data to ram when wwe is low. wcs0 29 out external rom chip select, active low. wcs1 30 out external ram chip select, active low. woe 31 out external rom/ram output enable, active low. wwe 28 out external ram write, active low. rbs 20 out ram byte select. used as lower address from ram when an 8-bit wide ram is connected. table 4. digital audio group pin name pin number type function clbd 19 out digital audio bit clock wsbd 27 out digital audio left/right select dabd0 25 out digital audio main stereo output dabd1 26 out auxiliary digital stereo output. reserved for surround effects. dac/daad 24 in dac type: 0 = i2s 16 to 20 bits, 1 = japanese 16 bits can also be used as digital audio input if 32k x 16 ram is connected.
4 ATSAM9713 1712b?drmsd?11/02 table 5. miscellaneous group pin name pin number type function x1 x2 10, 9 9.6 mhz crystal connection. an external 9.6 mhz clock can also be used on x1 (3.3v input). x2 cannot be used to drive external circuits. lft 8 pll external rc network reset 11 in reset input, active low. this is a schmitt trigger input, allowing direct connection of an rc network. pdwn 12 in power-down, active low. when power-down is active, then all output pins will be floated. the crystal oscillator will be stopped. to exit from power-down, pdwn should be high and reset applied. test[2:0] 33, 34, 35 in test pins. should be grounded. run 16 out when high, indicates that the synthesizer is up and running.
5 ATSAM9713 1712b?drmsd?11/02 pinout figure 2. ATSAM9713 pinout in 80-lead tqfp package 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 vcc wd13 wd14 wd15 gnd vcc vc3 lft x2 x1 reset pdwn vcc gnd midi in run vc3 vcc clbd rbs nc wa18 wa17 gnd vcc wa16 wa15 wa14 wa13 wa12 wa11 wa10 wa9 wa8 wa7 wa6 wa5 wa4 wa3 wa2 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 gnd vcc gnd dac/daad dabd0 dabd1 wsbd wwe wcs0 wcs1 woe vcc test0 test1 test2 gnd wa0 gnd wa1 nc vcc wd12 wd11 wd10 wd9 wd8 gnd wd7 wd6 wd5 wd4 wd3 wd2 wd1 wd0 gnd vcc vc3 gnd gnd
6 ATSAM9713 1712b?drmsd?11/02 absolute maximum ratings recommended operating conditions note: 1. when using 3.3v supply in a 5v environment, care must be taken that any pin voltage does not exceed v cc + 0.5v. pin x1 is powered by v c3 input. if x1 is driven by a 5v device, then a minimum series resistor is required (typ 330 ). dc characteristics table 6. absolute maximum ratings ambient temperature (power applied)................-40c to + 85c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating condtions for extended periods may affect device reliability. storage temperature.........................................-65c to + 150c voltage on any pin (except x1)......................-0.5v to v cc + 0.5v v cc supply voltage..............................................-0.5v to + 6.5v. v c3 supply voltage...............................................-0.5v t0 + 4.5v maximum i ol per i/o pin.....................................................10ma table 7. recommended operating conditions symbol parameter/condition min typ max unit v cc supply voltage (1) 3 3.3/5.0 5.5 v v c3 supply voltage 3 3.3 4.5 v t a operating ambient temperature 0 70 c table 8. dc characteristics (t a = 25c, v c3 = 3.3v 10% ) symbol parameter/condition v cc min typ max unit v il low-level input voltage 3.3 5.0 -0.5 -0.5 1.0 1.7 v v v ih high-level input voltage 3.3 5.0 2.3 3.3 v cc + 0.5 v cc + 0.5 v v v ol low-level output voltage i ol = -3.2ma 3.3 5.0 0.45 0.45 v v v oh high-level output voltage i oh = 0.8ma 3.3 5.0 2.8 4.5 v v i cc power supply current (crystal freq. = 9.6 mhz) 3.3 5.0 70 25 90 35 ma ma power-down supply current 70 100 a
7 ATSAM9713 1712b?drmsd?11/02 timings all timing conditions: t a = 25c, v cc = 5v, v c3 = 3.3v, all outputs except x2 and lft load capacitance = 30pf, crystal frequency or external clock at x1 = 9.6 mhz. external rom timing figure 3. rom read cycle external ram timing figure 4. 16-bit sram read cycle wcs0 wa[24:0] woe wd[15:0] t csoe t rc t poe t oe t df t ace table 9. timing parameters symbol parameter min typ max unit t rc read cycle time 130 ns t csoe chip select low/address valid to woe low 45 80 ns t poe output enable pulse width 78 ns t ace chip select/address access time 125 ns t oe output enable access time 70 ns t df chip select or woe high to input data high-z 0 50 ns wcs1 wa[24:0] wwe woe wd[15:0] t csoe t rc t poe t oe t df t ace
8 ATSAM9713 1712b?drmsd?11/02 figure 5. 16-bit sram write cycle wcs1 wa[18:0] wwe woe wd[15:0] t cswe t dh t dw t wp t wc table 10. timing parameters symbol parameter min typ max unit t rc read cycle time 130 ns t csoe chip select low/address valid to woe low 45 80 ns t poe output enable pulse width 78 ns t ace chip select/address access time 125 ns t oe output enable access time 70 ns t df chip select or woe high to input data high-z 0 50 ns t wc write cycle time 130 ns t cswe write enable low from cs or address or woe 40 ns t wp write pulse width 104 ns t dw data out setup time 95 ns t dh data out hold time 10 ns
9 ATSAM9713 1712b?drmsd?11/02 figure 6. 8-bit sram read cycle figure 7. 8-bit sram write cycle wcs1 wa[18:0] rbs wwe woe wd[7:0] t csoe t rc t orb t poe t oe t ach t df t ace high low low t dw1 wcs1 high rbs wwe woe t cswe t dw2 t wc t wp t wp t dh2 t dh1 t as wd[7:0] wa[18:0]
10 ATSAM9713 1712b?drmsd?11/02 digital audio figure 8. digital audio timing note: 1. when used as audio in. table 11. timing parameters symbol parameter min typ max unit t rc word read cycle time 130 ns t csoe chip select low/address valid to woe low 45 80 ns t poe output enable pulse width 78 ns t ace chip select/address low byte access time 70 ns t oe output enable low byte access time 20 ns t orb output enable low to byte select high 26 ns t ach byte select high byte access time 45 ns t df chip select or woe high to input data high-z 0 50 ns t wc word write cycle time 130 ns t cswe 1st wwe low from cs or address or woe 40 ns t wp write (low and high byte) pulse width 20 ns t dw1 data out low byte setup time 25 ns t dh1 data out low byte hold time 20 ns t as rbs high to second write pulse 8 ns t dw2 data out high byte setup time 40 ns t dh2 data out high byte hold time 10 ns wsbd clbd dabd0 dabd1 dac/daad t cw t cw t clbd t sod t sod (1) table 12. timing parameters symbol parameter min typ max unit t cw clbd rising to wsbd change 200 ns t sod dabd valid before/after clbd rising 200 ns t clbd clbd cycle time 416.67 ns
11 ATSAM9713 1712b?drmsd?11/02 digital audio frame figure 9. digital audio frame format notes: 1. selection between i2s and japanese format is through pin dac/daad in case of 32k x 8 sram. 2. digital audio in is available only in case of 32k x 16 sram. in this case, daad is 16 bits only. 3. when used as audio in. reset and power-down during power-up, the reset input should be held low until the crystal oscillator and pll are stabilized, which can take about 20 ms. a typical rc/diode power-up network can be used. after the low-to-high transition of reset , the following occurs: synthesis enters an idle state the run output is set to zero firmware execution starts from address 0100h in rom space (wcs0 low) if pdwn is asserted low, then all i/os and outputs will be floated and the crystal oscillator and pll will be stopped. the chip enters a deep power-down sleep mode. to exit power-down, pdwn has to be asserted high, then reset applied. recommended board layout as for all hcmos high-integration ics, some rules of board layout should be followed for reli- able device operation: gnd, v cc , v c3 distribution, decouplings all gnd, v cc , v c3 pins should be connected. gnd and v cc planes are strongly recom- mended below the ATSAM9713. the board gnd and v cc distribution should be in grid form. for 5v v cc operation, if 3.3v is not available, v c3 can be connected to v cc by two 1n4148 diodes in series. this guarantees a minimum voltage drop of 1.2v. recommended v cc decoupling is 0.1 f at each corner of the ic with an additional 10 f decoupling close to the crystal. v c3 requires a single 0.1 f decoupling close to the ic. crystal, lft the paths between the crystal, the crystal compensation capacitors, the lft filter r-c-r and the ATSAM9713 should be short and shielded. the ground return from the compen- sation capacitors and lft filter should be the gnd plane from ATSAM9713. msb lsb (16 bits) lsb (18 bits) lsb (20 bits) m sb wsbd (i2s) wsbd (japanese) clbd x x x x x x x x x x x x dabd0 dabd1 dac/daad (1) (1) (2) (3)
12 ATSAM9713 1712b?drmsd?11/02 analog section a specific agnd ground plane should be provided, which connects by a single trace to the gnd ground. no digital signals should cross the agnd plane. refer to the codec vendor recommended layout for correct implementation of the analog section. unused inputs unused inputs should always be connected. a floating input can cause internal oscillation inside the ic, which can destroy the ic by dramatically increasing the power consumption. if you plan to use the power-down feature, care should be taken that no pin is left floating during power- down. usually, a 1 m ground return is sufficient. recommended crystal compensation and lft filter figure 10. recommended crystal compensation and lft filter description note: the x2 output cannot be used to drive another circuit. c1 c4 22 pf 22 pf r1 100 ? c2 2.2 nf c3 10 nf x1 9.6 mhz x1 x2 lft pdwn v cc run clbd wsbd dabd1 dabd0
13 ATSAM9713 1712b?drmsd?11/02 mechanical dimensions figure 11. 80-lead thin plastic quad flat pack table 13. package dimensions (in mm) dimension min typ max a 1.401.501.60 a1 0.05 0.10 0.15 a2 1.35 1.40 1.45 d 15.90 16.00 16.10 d1 13.90 14.00 14.10 e 15.90 16.00 16.10 e1 13.90 14.00 14.10 l 0.450.600.75 p?0.65? b 0.220.320.38
printed on recycled paper. ? atmel corporation 2002. atmel corporation makes no warranty for the use of its products, other than those expressly contained in the company?s standard warranty which is detailed in atmel?s terms and conditions located on t he company?s web site. the company assumes no responsibility for any errors which may appear in this document, reserves the right to change de vices or specifications detailed herein at any time without n otice, and does not make any commitment to update the information contained herein. no licenses to patents or other intellectual property of at mel are granted by the company in connection with the sale of atmel products, ex pressly or by implication. at mel?s products are not authorized for use as critical components in life support devices or systems. atmel headquarters atmel operations corporate headquarters 2325 orchard parkway san jose, ca 95131 tel 1(408) 441-0311 fax 1(408) 487-2600 europe atmel sarl route des arsenaux 41 case postale 80 ch-1705 fribourg switzerland tel (41) 26-426-5555 fax (41) 26-426-5500 asia room 1219 chinachem golden plaza 77 mody road tsimhatsui east kowloon hong kong tel (852) 2721-9778 fax (852) 2722-1369 japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel (81) 3-3523-3551 fax (81) 3-3523-7581 memory 2325 orchard parkway san jose, ca 95131 tel 1(408) 441-0311 fax 1(408) 436-4314 microcontrollers 2325 orchard parkway san jose, ca 95131 tel 1(408) 441-0311 fax 1(408) 436-4314 la chantrerie bp 70602 44306 nantes cedex 3, france tel (33) 2-40-18-18-18 fax (33) 2-40-18-19-60 asic/assp/smart cards zone industrielle 13106 rousset cedex, france tel (33) 4-42-53-60-00 fax (33) 4-42-53-60-01 1150 east cheyenne mtn. blvd. colorado springs, co 80906 tel 1(719) 576-3300 fax 1(719) 540-1759 scottish enterprise technology park maxwell building east kilbride g75 0qr, scotland tel (44) 1355-803-000 fax (44) 1355-242-743 rf/automotive theresienstrasse 2 postfach 3535 74025 heilbronn, germany tel (49) 71-31-67-0 fax (49) 71-31-67-2340 1150 east cheyenne mtn. blvd. colorado springs, co 80906 tel 1(719) 576-3300 fax 1(719) 540-1759 biometrics/imaging/hi-rel mpu/ high speed converters/rf datacom avenue de rochepleine bp 123 38521 saint-egreve cedex, france tel (33) 4-76-58-30-00 fax (33) 4-76-58-34-80 warning: gms960800b may not be installed in any musical instrument except electronic keyboards and synthesizers that have a sale price of less than $75 fob. using this product in the manufacture of musical instruments or selling this product for use in a musical instrument (other than the exceptions noted above) is a violation of the intellectual property rights of roland corporation and will result in liability for infringement. e-mail literature@atmel.com web site http://www.atmel.com 1712b?drmsd?11/02 0m at m e l ? , dream ? and cleanwave ? are the registered trademarks of atmel. gs ? is the registered trademark of the roland com pany. other terms and product names may be the trademarks of others.

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